EMC Question of the Week: October 19, 2020
When driving a CMOS load (capacitive termination), overshoot and ringing on an otherwise good digital waveform is a clear indication that the _______ has not been properly controlled.
- connection inductance
- connection capacitance
- source voltage
- transition time
Answer
The best answer is "d". While the connection inductance is certainly a factor, the overshoot could not occur if the transition time were properly controlled. Overshoot and ringing occur when the circuit is underdamped (i.e. the resistance is less than half the square root of the ratio of the inductance to the capacitance. The ringing could be eliminated by reducing the inductance, but the resulting waveform would have a transition time that was too short for optimum signal integrity or EMC. (That's right. When it comes to signal integrity, faster transition times are not always better.)
Signals driving capacitive terminations should generally have controlled transition times that are one-fifth to one-tenth of the bit width in order to minimize the power in the upper harmonics. Power in the upper harmonics does not contribute appreciably to the signal integrity, and it is more likely to couple to other circuits resulting in crosstalk and other forms of interference. Transition times can be controlled on-chip or outside the chip using a series resistance. A series resistance sufficient to control the transition time is more than enough to damp any ringing in an otherwise good digital waveform.
Ringing due to an unintentional external source can be clamped using a diode in some situations. However, diodes should never be used to control ringing resulting from the actual signal source. The best way to control ringing in a digital signal is to simply take control of the transition time.
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