EMC Question of the Week: December 2, 2024
A 2-Ω, 100-MHz clock source drives 4 CMOS inputs on a circuit board over a distance of about 5 cm. The trace impedance is about 75 Ω. Which terminating resistor(s) configuration shown in the figure is appropriate?
- parallel 75-Ω resistor at far end
- parallel 75-Ω resistor at source end
- parallel 75-Ω resistor at both ends
- series 10-Ω resistor at source end